Issue
EPJ Photovolt.
Volume 15, 2024
Special Issue on ‘EU PVSEC 2023: State of the Art and Developments in Photovoltaics’, edited by Robert Kenny and João Serra
Article Number 16
Number of page(s) 7
DOI https://doi.org/10.1051/epjpv/2024016
Published online 30 April 2024

© B. Bazer-Bachi et al., Published by EDP Sciences, 2024

Licence Creative CommonsThis is an Open Access article distributed under the terms of the Creative Commons Attribution License (https://creativecommons.org/licenses/by/4.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

1 Introduction

Cast-mono silicon (CM-Si) is a hybrid material between Czochralski monocrystalline silicon (Cz-Si) and cast grown multicrystalline silicon [1]. During the ingot crystallization, the seeds deposited at the bottom of the crucible allow a controlled growth with the same crystal orientation as the seeds, usually <100>. Compared to Cz material, cast-mono wafers contain more metallic impurities mainly originating from the crucible and crystal defects such as dislocations appearing during the growth. Such drawbacks lead to lower overall performances of the cast-mono material. This reduced performance is counterbalanced by lower production costs and lower emissions of greenhouse gases [2].

The replacement of Solar Grade silicon (SoG-Si) by Upgraded Metallurgical Grade silicon (UMG-Si) is a solution to further reduce the carbon footprint, and production costs [3]. However, as UMG-Si shows higher impurity content (both metallic and non-metallic), the resulting efficiency might be lower than using conventional SoG-Si, purified via Siemens process. In order to enhance performances of UMG-Si, a gettering step can be implemented to remove metallic impurities prior to solar cell processing [4,5].

Industrial TOPCon sequences have been used successfully on n-type cast-mono Si wafers [6]. This study aims to compare the use of these two SoG-Si and UMG-Si materials, using n-type silicon wafers produced in an industrial-size furnace. To evaluate the potential of each cast-mono material, TOPCon solar cells are fabricated, as it is state-of-the-art architecture, and it shows high gettering potential [7,8].

It was shown previously that the gettering effectiveness can be enhanced by optimizing TOPCon sequence, using less stoichiometric oxide or with higher amount of pinholes [9], or higher diffusion/anneal temperature [10] for example. The second part of this work aims to test several TOPCon sequences, as the gettering potential differs, depending on the type of process used.

2 Experimental details

The wafers used in this study originate from two 650 kg industrial size Phosphorus-doped ingots, grown either using SoG-Si feedstock or using UMG-Si feedstock. SoG-Si is purified via Siemens process [11]. UMG-Si is obtained from metallurgical silicon, after adding several purification steps. UMG-Si is a compensated silicon, as it contains both polarity type dopants (donors and acceptors). Additional details about the process, the purity of silicon and the amount of impurities are available in literature [4,12].

15.7 cm × 15.7 cm n-type cast-mono Si wafers produced from these ingots show resistivities of 1.6–1.9 Ω.cm and 0.6–0.9 Ω.cm for cast-mono SoG-Si (CM-SoG) and cast-mono UMG-Si (CM-UMG) respectively. N-type Cz wafers, with resistivity of 0.9–1.1 Ω.cm are added as references. Cz-Si originates from SoG-Si purified via Siemens process.

CM-Si crystallization results in the formation of dislocations clusters originating from different crystal defects [1315]. The dislocation generation is hardly controllable, and the amount and the distribution of the dislocations differ from one ingot to another. Thus, the variation of the dislocation rate is more a crystal growth issue than a feedstock type effect. In the present study, for each ingot (CM-SoG and CM-UMG), wafers are coming from 2 different bricks. In each brick, the dislocation growth varies so the position and rate of dislocation within the wafer are different. Bricks 1 and 2 are associated to the UMG-Si ingot and Bricks 3 and 4 are linked to SoG-Si ingot.

TOPCon solar cells fabrication first consists in saw damage removal followed by random pyramid formation in alkaline solution. A tube furnace diffusion using BBr3 forms a 150 Ω/sq boron emitter. The unwanted emitter is removed by single side Borosilicate Glass (BSG) etch followed by alkaline silicon removal in a batch system and the unwanted emitter and borosilicate glass on the rear side are removed. In the standard process, the TOPCon stack consists in a thermally grown tunnel oxide and an in situ doped polysilicon layer, both formed subsequently in a low-pressure chemical vapor deposition tube. The parasitic deposition on the front side is then chemically removed and followed by annealing and both sided surface passivation (ALD-Al2O3 + SiNx:H). Finally, screen-printing is applied, using Ag-Al paste on front side and Ag paste on the back side followed by contact firing in a conventional belt furnace. The laser-enhanced contact optimization (LECO) step is applied at the end of the process [16]. The metallization and firing processes used in this study are compatible with the LECO process. This process is called in the following standard process. Additional TOPCon sequences will be applied and described in the results sections.

Symmetrical lifetime samples are also fabricated. In order to take into account all the high temperature process steps, the samples first underwent the boron diffusion (after texturing and cleaning). After boron diffusion, the p+ layer is removed and the TOPCon sequence is applied on both sides to all samples, varying several parameters (tunnel oxide type, doping process, poly-Si thickness and anneal temperature). Finally, the samples are passivated and fired. Quasi-steady-state photoconductance (QSSPC) measurements determine the iVoc,max which corresponds to the maximum implied Voc achievable, as the boron diffused layer is removed beforehand. Due to some non-linearities of the fit of the inverse lifetime curve the extraction of reliable J0e and τbulk for the full data set was not possible. The best comparable data are therefore the iVoc,max. The electrical properties of the cells are characterized by current voltage (IV) measurements in light illumination at 25 °C (AM1.5 global spectrum). Photoluminescence imaging are carried out on the cells.

3 Comparison of solar cells results from cast-mono and Cz wafers

3.1 Solar cell results

The first part of this study aims to compare solar cells fabricated from Cz-Si and CM-Si wafers, obtained with two silicon feedstocks: SoG-Si and UMG-Si. Standard process is used for the TOPCon sequence for the solar cells, as described in part 2. The average efficiency difference is 0.51%abs between Cz-Si and the best CM-Si efficiencies, while the maximum efficiencies are 22.52% and 22.25% for Cz-Si and CM-UMG, respectively. The efficiency gain for Cz-Si is due to an increase of all IV parameters. Contrary to Cz-Si, CM-Si contains, for both UMG-Si and SoG-Si, dislocation clusters and metallic impurities lowering bulk lifetime and affecting the solar cells parameters [6,17].

Table 1 shows the solar cells results obtained for the 3 types of wafers i.e. Cz-Si, CM-SoG and CM-UMG. The average efficiency difference is 0.51%abs between Cz-Si and the best CM-Si efficiencies, while the maximum efficiencies are 22.52% and 22.25% for Cz-Si and CM-UMG, respectively. The efficiency gain for Cz-Si is due to an increase of all IV parameters. Contrary to Cz-Si, CM-Si contains, for both UMG-Si and SoG-Si, dislocation clusters and metallic impurities lowering bulk lifetime and affecting the solar cells parameters [6,17].

Comparing CM-UMG to CM-SoG, the efficiency of CM-UMG is 0.54%abs higher than the efficiency of CM-SoG caused by an increase of Voc and FF.

To assess the FF losses, three parameters are considered. The Fill Factor (FF) is extracted from the illuminated IV curve. The pseudo–Fill Factor (pFF), which is free from resistive losses, is extracted from the Suns-Voc curve. The ideal Fill Factor (FF0) which is free from resistive losses, shunt and space charge region (SCR) recombination losses, is calculated from the ideal IV curve [18,19]. Consequently, as shown in [20], pFF-FF stands for FF losses due to series resistance while FF0-pFF shows FF losses due to SCR recombination, as long as the parallel resistance exceeds 4500 Ω.cm2; which is the case in the following.

The loss in FF for the CM-SoG cells is firstly due to higher series resistance, resulting in higher pFF-FF for CM-SoG compared to CM-UMG as the resistivity of CM-SoG is higher than for CM-UMG. Furthermore, UMG-Si contains more metallic impurities than SoG-Si, resulting in the creation of recombination centers within the SCR. Consequently, FF0-pFF for CM-UMG should be higher than FF0-pFF for CM-SoG. The contrary is observed in Table 1: FF0-pFF for CM-UMG is lower than for CM-SoG; meaning that the recombination losses within the SCR are lower for CM-UMG than for CM-SoG.

The effect of resistivity is first addressed to understand the results obtained for CM-SoG. Indeed the higher resistivity of CM-SoG leads to higher SCR width [21], and in this case, recombination within the SCR are higher [21,22], explaining the higher FF0-pFF for CM-SoG.

Moreover, the spatial repartition of the dislocation within the wafers has to be considered, as dislocations create additional shunt paths within the space charge region [23]. Figure 1 shows PL images of cells for the three studied materials. For CM-SoG and CM-UMG, two PL images are shown, corresponding to the 4 different groups of cells described in the experimental part, with different dislocations locations and concentrations, representative of the other cells. Unfortunately, quantitative values of the dislocation rate are not available for the wafers in the present study. The comparison is thus qualitative, considering the PL images shown in Figure 1.

Figure 1 also shows that when the dislocation rate is very low, as for Brick 1, Voc and FF0-PFF are close to Cz results. As the dislocation rate increases, as for Brick 4, FF0-PFF increases and Voc decreases. It turns out that the wafers from SoG material (Bricks 3 and 4) have a highest amount of dislocations, resulting in higher losses both for Voc and FF. As mentioned in Section 2, this is rather due to the crystal growth itself than to the effect of the feedstock type.

Table 1

IV parameters of the TOPCon solar cells fabricated from different material types (Cz-Si, CM-UMG and CM-SoG). The results are averaged out of 6–9 cells with optimized firing temperature. These measurements are in-house measurements, the front contact is obtained by GridTouch, the rear contact by a non-conductive dark chuck together with rear contacting pins.

thumbnail Fig. 1

PL images of representative cells, for three materials, Cz, CM-SoG and CM-UMG. For each cell, the corresponding Voc and FF0-PFF values are depicted.

3.2 Symmetrical lifetime samples results

In order to confirm the detrimental influence of the dislocation, iVoc,max measurements on symmetrical samples passivated with TOPCon layers were conducted either on dislocation free parts of the sample and dislocated regions of the samples using QSSPC setup. Standard process is used for the TOPCon sequence for all samples. The results are shown in Table 2.

On regions containing dislocations, iVoc,max is lower compared to dislocation free regions, confirming the detrimental influence of dislocations on Voc. Moreover, iVoc,max for CM-SoG is lower than for CM-UMG, as the dislocation clusters are denser for CM-SoG, as shown in Figure 1.

On dislocation free regions, iVoc,max for CM-UMG and CM-SOG are closer to Cz values. The difference between Cz and CM-Si is partly due to the metallic impurities, which might be removed using efficient gettering. Note that iVoc,max is slightly higher for CM-UMG than for CM-SoG, most probably because CM-UMG resistivity is lower.

Table 2

iVoc,max measurements obtained from QSSPC measurement conducted on both dislocation free and dislocated region for three materials, Cz, CM-UMG and CM-SoG. The results are averaged out of 4–6 wafers.

4 Optimization of the TOPCon process

As shown in the previous section, there is a gap between the Cz and CM efficiencies, explained by the presence of dislocations and metallic impurities. However, the TOPCon layer generates a strong impurity gettering effect, removing metallic impurities such as iron [24]. Even though the authors conducted their experiment on p-type substrate, one can assume that a positive effect of enhanced gettering should be reached on n-type substrate, as n-type material also well reacts to phosphorus gettering [17,25].

The second part of this work thus deals with the optimization of the TOPCon process to enhance the impurity gettering. In order to test the ability of the TOPCon layer to getter, several TOPCon process steps are modified: the type of tunnel oxide (chemical or thermal), the doping process (in situ or ex situ, using POCl3 diffusion), the poly-Si layer thickness (low − 80 nm or high − 150 nm) and the anneal temperature (low − 900 °C or high − 950 °C). The ramping down rate during the anneal step is kept similar for both temperatures.

4.1 Symmetrical lifetime samples results

The experiment deals with the evaluation of iVoc,max for the different TOPCon sequences, as described above. Figure 2 shows the variation of the iVoc,max, for the three types of material, i.e. Cz-Si, CM-UMG and CM-SoG and for all the TOPCon processes tested. The standard sequence corresponding to a thermal oxide with a thin poly-Si, an in situ doping and a low temperature thermal annealing, is shown on the left-hand side of the graph (Thin poly-Si).

In order to take into account, the different spatial positions of the dislocations within the sample (as discussed in the previous section), the measurement are done in 5 different positions (center and 4 corners) which explain the highest dispersion of iVoc,max for CM-Si. Thus apart from the dispersion due to the dislocations, average iVoc,max of CM-UMG and CM-SoG remain similar whatever the TOPCon process.

Overall, the CM-Si iVoc,max results follow the same trend as Cz-Si results. Even though some parameters such as chemical oxide, high temperature or thicker poly-Si have more potential for enabling external gettering, iVoc,max is dominated by the surface passivation quality.

Below is a detailed analysis on the effect of process steps on the surface passivation quality.

Higher anneal temperature − Using a higher annealing temperature always leads to a degradation of iVoc,max. Indeed the increase in temperature leads to a stronger in-diffusion of the dopants within the bulk Si. This in-diffused region adds Auger and Shockley Read Hall (SRH) recombination, which is not compensated by the better field effect passivation of the poly-Si and the in-diffused region [26].

Chemical oxide − As demonstrated earlier [27,28], the chemical oxide is less dense and off-stoichiometric compared to thermal oxide, resulting in a decreased passivation quality. Moreover, chemical oxide is more sensitive to higher temperature annealing, leading to an additional loss in iVoc,max. The stronger thermal expansion of the tunnel oxide induces stress within the layer and damages the tunnel oxide, lowering the chemical surface passivation and facilitating the phosphorus atoms in-diffusion (leading to higher Auger and SRH recombination).

Ex situ doping − The ex situ doping is more detrimental, especially for chemical oxide and higher temperature. No dopant profiles are available. However, even though the maximum temperature is the same for in situ and ex situ doping, the dopant profile should differ as the diffusion sequence is different. One can hypothesize that the in-diffusion beyond the tunnel oxide is more pronounced for ex situ doping.

Thicker poly-Si − Using a thicker poly-Si layer leads to an increase of the iVoc,max up to 740 mV for Cz-Si and 727 mV for UMG-Si. This is due to the increased electric field of the thicker poly-Si layer. Moreover, the process modification induced using a thicker poly-Si layer results in a slightly different dopant profile, leading to a higher passivation quality.

thumbnail Fig. 2

Variation of the iVoc,max as a function of the material type and on the recipe parameters: thin or thick poly-Si, in situ or ex situ doping, thermal or chemical oxide and high or low temperature. The values shown are mean values of 4–8 samples.

4.2 Solar cell results

Following the lifetime samples measurements, solar cells are fabricated using the two optimum TOPCon sequences in addition to the standard process used in Section 3. The results for the standard process are the same as the ones presented in Table 1. While ex situ doping at low temperature with thermal oxide gave good iVoc,max results, lifetime inhomogeneities was observed on PL image (Fig. 3a, arrow), which was not the case using in situ doping, for both thermal and chemical oxide (Figs. 3b and 3c, respectively). The solar cell fabrication thus focuses on the best results obtained for in situ doping, defined as:

  • Standard: Thermal Oxide + Thin poly-Si + In situ Doping + Low Temperature annealing

  • Thermal Oxide: Thermal Oxide + Thick poly-Si + In situ Doping + Low Temperature annealing

  • Chemical Oxide: Chemical Oxide + Thick poly-Si + In situ Doping + Low Temperature annealing.

Figures 4a–4d show the solar cells I/V results for the three selected recipes and the two CM-Si materials. Table 3 gives details about the FF losses, showing pFF-FF and FF0-PFF values for the three TOPCon recipes and the two CM-Si materials.

Similarly to the lifetime samples, the efficiency is higher using a thermal oxide associated with a thicker poly-Si layer, compared to the Standard process. The highest efficiency results from an enhancement of Voc (as already observed in previous section) and FF. Table 3 shows that thicker poly-Si leads to reduce the series resistance (lower pFF-FF) thanks to the higher conductivity of the thicker poly-Si layer and/or the lower contact resistance between Ag paste and poly-Si. The lower FF0-PFF shows that the thicker TOPCon layer also reduces the recombination within the SCR. It was shown previously that a thicker layer results in less damage of the oxide layer during fire-through screen-printing contacts consequently mitigating recombination at the metal contacts [29]. There could be also an effect of an enhanced gettering of impurities, thanks to thicker layer, but the two effects cannot be decoupled for now.

Using chemical oxide instead of thermal oxide gives lower efficiency, mainly due to reduced Voc even though FF increases. The reduction of Voc is explained by the reduced passivation quality of the TOPCon layer using chemical oxide, as already stated in the previous section. The FF increase is both due to a reduction of FF0-PFF and pFF-FF (Tab. 3). Using chemical oxide results in the formation of pinholes which facilitate the conduction [30]. The presence of pinholes enables faster gettering [5], leading to a further reduction of the SCR recombination resulting in lower FF0-PFF than thermal oxide.

For both thermal and chemical Oxide, the thicker poly-Si layer leads to lower Jsc, due to a higher free carrier absorption of the thicker poly-Si layer [31].

The trend observed in Figure 4 is the same as in Table 1: CM-UMG shows better results than CM-SoG due to the impact of dislocations on both Voc and FF.

Finally, the two champion cells using CM-Si and including a thicker poly-Si layer with a Thermal Oxide (Thermal Oxide in Fig. 4) where independently measured at Fraunhofer ISE CalLab in Germany, and result in efficiencies of 22.45% and 22.65% for CM-SoG and CM-UMG respectively (CalLab measurement condition: 12 front bus bars contact on the front side and rear reflective conducting chuck, AM1.5, 1000W/m2).

thumbnail Fig. 3

PL image of the symetrically passivated Cz-Si samples for (a) ex situ doping at low temperature with thermal oxide (b) in situ doping at low temperature with thermal oxide and (c) in situ doping at low temperature with chemical oxide.

thumbnail Fig. 4

Solar cells I/V results (a) efficiency (b) Voc (c) Jsc and (d) FF as a function of the TopCon sequence, for CM-UMG and SoG-UMG. The results are averaged out of 6–9 cells with optimized firing temperature.

Table 3

FF losses, i.e. pFF-FF and FF0-pFF as a function of the TOPCon recipe, for CM-UMG and SoG-UMG.

5 Conclusion

This study showed that using UMG-Si as feedstock for fabricating cast-mono TOPCon solar cells is a promising option, as the efficiency is only 0.5 %abs lower than Cz-Si. The harmful effect of dislocation rate has been shown qualitatively, and is especially detrimental for the FF, as dislocations create recombination paths within the space charge region. This explains the weaker results obtained with SoG-Si, as the dislocation rate is slightly higher.

Optimizing the TOPCon sequences leads to an additional efficiency gain of +0.4 %abs, using a thicker poly-Si layer coupled with thermal oxide. This enhancement is induced by the increase in Voc and FF, thanks to a better surface passivation, a reduced metal recombination and probably to a more effective gettering. For chemical oxide, the better gettering induced by the presence of pinholes does not counterbalance the degradation of the surface passivation, due to the detrimental effect of the pinholes, leading to a decrease of the efficiency.

Funding

This research received no external funding.

Conflicts of interest

No conflicts of interest to declare.

Data availability statement

The data are not publicly available due to privacy or ethical restriction.

Author contribution statement

Conceptualization, B. Bazer-Bachi, J. Posada and P. Saint-Cast; Experimental Work, Characterization P. Saint-Cast and C. Tessmann; Methodology, B. Bazer-Bachi, J. Posada and P. Saint Cast; Formal Analysis, B. Bazer-Bachi, C. Tessmann and P. Saint-Cast; Writing − Original Draft Preparation, B. Bazer-Bachi; Writing − Review & Editing, B. Bazer-Bachi P. Saint-Cast, R. Bodeux, S. Mack; Visualization, J. Posada; Supervision, G. Goaer, S. Mack; Validation, G. Goaer; Project Administration, J. Posada, P. Saint-Cast, B. Bazer-Bachi.

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Cite this article as: Barbara Bazer-Bachi, Pierre Saint-Cast, Jorge Posada, Samuel Williatte, Christopher Tessmann, Romain Bodeux, Sebastian Mack, Gilles Goaer, Assessing the potential of TOPCon solar cells architecture using industrial n-type cast-mono silicon material, EPJ Photovoltaics 15, 16 (2024)

All Tables

Table 1

IV parameters of the TOPCon solar cells fabricated from different material types (Cz-Si, CM-UMG and CM-SoG). The results are averaged out of 6–9 cells with optimized firing temperature. These measurements are in-house measurements, the front contact is obtained by GridTouch, the rear contact by a non-conductive dark chuck together with rear contacting pins.

Table 2

iVoc,max measurements obtained from QSSPC measurement conducted on both dislocation free and dislocated region for three materials, Cz, CM-UMG and CM-SoG. The results are averaged out of 4–6 wafers.

Table 3

FF losses, i.e. pFF-FF and FF0-pFF as a function of the TOPCon recipe, for CM-UMG and SoG-UMG.

All Figures

thumbnail Fig. 1

PL images of representative cells, for three materials, Cz, CM-SoG and CM-UMG. For each cell, the corresponding Voc and FF0-PFF values are depicted.

In the text
thumbnail Fig. 2

Variation of the iVoc,max as a function of the material type and on the recipe parameters: thin or thick poly-Si, in situ or ex situ doping, thermal or chemical oxide and high or low temperature. The values shown are mean values of 4–8 samples.

In the text
thumbnail Fig. 3

PL image of the symetrically passivated Cz-Si samples for (a) ex situ doping at low temperature with thermal oxide (b) in situ doping at low temperature with thermal oxide and (c) in situ doping at low temperature with chemical oxide.

In the text
thumbnail Fig. 4

Solar cells I/V results (a) efficiency (b) Voc (c) Jsc and (d) FF as a function of the TopCon sequence, for CM-UMG and SoG-UMG. The results are averaged out of 6–9 cells with optimized firing temperature.

In the text

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