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Fig. 1


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Flowchart of the sacrificial-layer texturing approach (Tsac). A schematic representation of the sacrificial layer and silicon surface at each phase (phase I–IV) is presented on the left. Processing steps 1–4 are referenced in the text. A cross-sectional SEM image of the silicon surface and sacrificial layer at phase II is presented in the centre, following implantation in an approximately 1.5 μm a-Si layer. Raman spectroscopy measurements of the sacrificial layer at phase II and phase III are presented in the top right plot, where the peak referred to as c-Si is positioned at 520 cm−1 and the peak referred to a-Si at around 480 cm−1. SEM images of the cross-section and surface of the substrates at a 40° tilt, at phase III and IV and at some point between these phases are presented as well.

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