Table 2
Four scenarios applied in the study. Based on the combination of 2 technological pathways and 2 circularity options.
Technology | ||
---|---|---|
Name | 2021 State-of-art PERC | 2032 ITRPV projection |
Kerf loss (μm) | 60 | 43 |
Wafer thickness (μm) | 165 | 140 |
Module efficiency (%) | 20.9 | 22.5 |
Polysilicon consumption (g/Wp) | 2.59 | 1.96 |
Lifetime (years) | 25 | 35 |
Circularity | ||
Name | Business-as-usual | Closed-loop |
EOL collection rate | None | 85% |
Microsilica from MG-Si production | Used externally | |
Internal recycling | Slabs, tails and, tops from ingot cropping recovered and re-used in Cz ingot growth | |
Kerf loss recycling | Used externally | Recovered as metallurgical grade silicon and fed into poly-Si production (efficiency − 65%) |
End-of-life recycling | No silicon recovery | FRELP technology. Recovered as metallurgical grade silicon and fed into poly-Si production (efficiency − 95%) |
Scenario | ||
Technology | Circularity | |
Scenario 1 (S1) | 2021 State-of-art PERC | Business-as-usual |
Scenario 2 (S2) | 2021 State-of-art PERC | Closed-loop |
Scenario 3 (S3) | 2032 ITRPV projection | Business-as-usual |
Scenario 4 (S4) | 2032 ITRPV projection | Closed-loop |
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