Issue
EPJ Photovolt.
Volume 11, 2020
Disordered Semiconductors and Photovoltaic Applications
Article Number 7
Number of page(s) 7
DOI https://doi.org/10.1051/epjpv/2020004
Published online 09 July 2020

© Md.E. Karim et al., published by EDP Sciences, 2020

Licence Creative Commons
This is an Open Access article distributed under the terms of the Creative Commons Attribution License (https://creativecommons.org/licenses/by/4.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

1 Introduction

Carrier selective layers using metal oxides and organic materials for crystalline Si (c-Si) photovoltaics have been extensively studied to replace classical high-temperature p-n junction and low-pressure processing. They include aluminum oxide (Al2O3), NiO, graphene oxide, and the transparent conductive polymer poly(3,4-ethylenedioxythiophene): poly(styrene sulfonate) (PEDOT:PSS) as an electron blocking layer (EBL). Among them, solution-processed PEDOT:PSS provides good passivation of c-Si and acts as a transparent hole transporting layer, which induces strong inversion at the PEDOT:PSS/n-Si interface without any additional impurity doping. The junction properties at PEDOT:PSS/n-Si interfaces can be explained in terms of p+-n junction model [13]. However, the band bending at the rear cathode interface is still less than the anode interface despite the use of a low work function metal [46]. To address this, several interfacial materials which act as an electron selective layer (ESL) have been studied, including transition metal oxides and fluorinated alkali metals such as magnesium oxide (MgO) [7], titanium oxide (TiO2) [813], barium hydroxide (Ba(OH)2) [14,15], cesium carbonate (Cs2CO3) [16,17], lithium fluoride (LiF) [18,19], magnesium fluoride (MgF2) [20]. Among them, TiO2 on Si(100) has been shown to blocks holes (ΔEV ≥ 2.3 eV) while being transparent to electrons (ΔEC < 0.3 eV), thereby acting as a hole blocking layer (HBLs). Several deposition methods have been applied for the fabrication of TiO2 thin films such as PE-CVD [2124], metal-organic chemical vapor deposition (MO-CVD) [25], pulsed laser deposition (PLD) [26], atomic layer deposition (ALD) [2730], sputtering [31], and sol-gel [32]. Among them, ALD of TiO2 has been extensively studied and effective minority carrier recombination velocities below 100 cm/s have been achieved [33]. However, the potential of solution-processed TiO2 as an HBL for n-Si heterojunction solar cells is still not clear.

The present study demonstrates the potential of solution-processed TiO2 as an HBL to improve the photovoltaic performance of PEDOT:PSS/n-Si/TiO2 double heterojunction solar cells. The junction properties of n-Si/TiO2 cathode interfaces are also investigated in terms by transient reverse recovery Trr measurement to determine the effective surface recombination velocity S at n-Si/TiO2 interface.

2 Experimental procedure

2.1 Solution-processed TiO2 and device fabrication

Figure 1 shows the molecular structure of PEDOT:PSS and device structure of PEDOT:PSS/n-Si/TiO2 double heterojunction solar cells. Both-side-polished 2 × 2-cm2 n-type (100) CZ c-Si wafers (1–5 Ω cm) with a thickness of 250 μm were used as the base substrate. Prior to the film deposition, the n-Si substrates were ultrasonically cleaned with acetone, isopropanol, and DI-water for 10 min each, followed by 5 wt.% HFaq treatment for 3 min to remove the native oxide. As a first step, a solution of PEDOT:PSS (prepared from CleviosR PH1000 by adding ethylene-glycol and capstone fluorosurfactant in a ratio of 93:7:0.16 wt.%) was spin-coated (SC) on top of the cleaned n-Si substrate, followed by thermal annealing at 140 °C for 30 min to remove the residual solvent. Then Ag grid electrodes were screen printed at the top of the PEDOT:PSS. In a next step, a precursor solution of titanium tetraisopropoxide [Ti(OCH(CH3)2]4:TiP) diluted in isopropyl alcohol at three different concentrations of 0.5, 1, and 2 mg/ml was spin-coated at 3000 rpm for 40 s on the rear side of the n-Si followed by thermal annealing at 140 °C for 10 min to remove the residual solvent. The hydrolysis reaction described below was applied to synthesize titanium dioxide on the n-Si substrate as an HBL [34].

Two types of device structures were fabricated as shown in Figure 1b. One is a single layer of PEDOT:PSS(80 nm)/n-Si/TiO2 double heterojunction solar cells of 1, 2, and 3 nm thickness TiO2, formed by adjusting the solution concentration on the top of the Ag grid electrode, to understand the thickness effect of TiO2 on cathode interface. The other is the alternate coating of TiO2 layers to suppress the junction area at the Ag/n-Si contact. This structure was fabricated by first forming a 1-nm-thick TiO2 layer on the n-Si substrate, followed by a screen print of the Ag grid electrode. Then, another 2-nm-thick TiO2 was spin coated on top of the Ag grid/TiO2/n-Si structure. Finally, the Al was evaporated in from the entire area of the rear side to form the cathode electrode.

thumbnail Fig. 1

(a) Molecular structure of PEDOT:PSS, (b) schematic of PEDOT:PSS/n-Si/TiO2 double heterojunction solar cells with single- and double-TiO2 layers as an HBL.

2.2 Characterizations

The junction properties at the TiO2/n-Si interface were evaluated using atomic force microscopy (AFM), X-ray photoemission spectroscopy (XPS), effective minority carrier lifetime τeff, and the electroluminescence in solar cell under dark current injection in the forward bias condition.

2.2.1 XPS study

XPS measurements were performed for the Ti4+ peak with a binding energy of 458.6 eV for 2p3/2 and 464.7 eV for 2p1/2 and the Si(2p) line region at 99.4 ± 0.3 eV using a monochromatized Al Kα radiation of  = 1486.6 eV [AXIS-Nova (Kratos Analytical)]. The formation of suboxides at the TiO2/n-Si interface was examined by deconvolution including metallic Si, Si+, Si2+ and Si4+ complexes in the 100–104 eV regions. The effect of Al metallization on the Al/TiO2/n-Si interface was examined by depositing Al a few nanometers thick by evaporation.

2.2.2 Carrier lifetime

The PEDOT:PSS and TiO2 layers on n-Si n-type c-Si(1-5 Ω · cm) substrates were examined through a 2D map of minority carrier lifetime τeff measurements (SLT-1410A, KOBELCO). TiO2 layers with different thicknesses were spin coated by adjusting the solution concentration and then thermally annealed at 140 °C for 10 min prior to the lifetime measurement.

2.2.3 Characterization of solar cells

The current density–voltage (JV) characteristics were measured in the dark and under exposure with simulated solar light of AM1.5G, 100 mW/cm2 [Bunkoukeiki (CEP-25BX)]. The light exposure area was masked using a shadow mask to avoid the light leakage. The photovoltaic performance was studied using a 2 × 2-cm2 device under simulated of AM1.5 solar light exposure at 25 °C. The short-circuit current density Jsc, open-circuit voltage Voc, fill factor FF and power conversion efficiency PCE were determined from the photocurrent density–voltage (JV) curves. The external quantum efficiency EQE was also measured with and without bias light exposure. The two-dimensional (2D) map of EQE at 1000 nm was also characterized for devices with a 2 × 2 cm2 area using a Lasertec: MP Series.

2.2.4 Transient reverse recovery Trr measurement

Trr, unlike µ-PCD, does not is need to use both sides of the symmetric TiO2 coated samples to determine S. Hence, it can be used to determine the recombination velocity of the complete solar cell device structure. Figure 2 presents (a) the circuit diagram used for the Trr study and (b) the expected output current. Here, Vts is the transient bias source, RL (100 Ω) is the external load resistance, the blue dashed line area represents the simple equivalent circuit of the solar cell device, and Rs and Rsh are equivalent series and shunt resistance. The details of the Trr measurement are described in references [35,36]. First, a positive Vts higher than the built-in potential is applied to the circuit to achieve the steady forward current level ID and Ish. Then, a reverse bias is applied to the device under test and the time of recovery to a steady state was monitored by combining a programmable rectangle wave (WW2074 model of Tabor Electronics) of 1 KHz and the digital storage oscilloscope (DSO7054A model of Agilent Technologies) signal. The amount of stored charge inside the bulk can be calculated by:(1)

where, I is the maximum recovery current and ts is the storage time. Assuming that Isi/HBL (tsi/HBL) and Isi (tsi) are the transient currents (storage times) for devices with and without HBLs, then the storage charge ratio Qratio can be determined by:(2) (3)

Qratio can be obtained from the diffusion coefficient Dp and recombination velocity S as follows: (4)

Thus, S can be calculated by determining Qratio without calculating the exact amount of excess hole density and the effect of bulk recombination. The τs value was also calculated by μ-PCD using the following well-known equation to confirm the reliability of the S value [37]:(5)

where W is the thickness of the Si substrate and D is the minority carrier diffusion constant of n-Si.

thumbnail Fig. 2

Schematics of (a) the circuit diagram and (b) Trr current for devices with and without HBLs.

3 Results and discussion

3.1 Solution-processed TiO2

Figure 3a shows the AFM image and line profile of 2-nm-thick TiO2 spin coated from the precursor with 1 mg/ml concentration on an n-Si wafer. The RMS value was 0.215 nm in the 5 × 5 µm2 area, which value was almost same with that of ALD. In Figure 3b, the 2-dimensional map of τs is shown for 2- and 10-nm-thick TiO2. About 4 times higher average lifetime value was observed for the ∼2-nm-thick TiO2 coated device compared to the bare-Si (∼7 µs), with slight non-uniformity, this non-uniformity may come from partial Si surface exposure to air due to the ultrathin TiO2 layer. The ∼10 nm-thick-TiO2 coated sample shows comparatively uniform and 5∼6 times higher lifetime value with respect to bare silicon. Although these lifetime values are much lower than the PEDOT:PSS value (∼230 µs) (Fig. 3c), which implies that the passivation level was worse compared to the PEDOT:PSS/n-Si anode interface. Thus, recombination properties of PEDOT:PSS/n-Si/TiO2 structure is mostly dominated by cathode (Si/TiO2) interface.

thumbnail Fig. 3

(a) AFM image and line profile for 2-nm-thick TiO2 on an n-Si wafer. (b) 2D map of τs for 2- and 10-nm-thick TiO2 coated on n-Si at both the front and bottom surfaces. (c) 2D map of τs for 80-nm-thick PEDOT:PSS.

3.2 Photovoltaic performance of solar cells

Figure 4a shows the JV characteristics of PEDOT:PSS/n-Si heterojunction solar cells with different thickness TiO2 HBLs of 1, 2, and 3 nm, together with that of a pristine (without TiO2) device under AM1.5G simulated solar light exposure. The solar cell parameters for the corresponding devices are summarized in Table 1. Jsc increased from 27.53 to 30 mA/cm2 with increasing FF and Voc for TiO2 thicknesses of 1 and 2 nm. This is due to the lowering of the work function of Al by inserting a TiO2 layer as well as the enhanced hole blocking capability at the cathode interface. A large number of holes diffuse backward inside the bulk Si. As a result, the PCE increased from 11.23% for the pristine device to 13.08% for a TiO2 HBL device on a plain substrate with a TiO2 thickness of ∼2 nm.

Figure 4b presents the EQE for PEDOT:PSS/n-Si devices with and without a 2-nm-thick TiO2 HBL double layer. The inset shows the normalized EQE of the corresponding device. The EQE at the n-Si/cathode interface region corresponding to a wavelength of ∼1000 nm increased for the double-layer TiO2 inserted device more than for the single-layer device. These findings originate from the reduction of carrier recombination at the Si/cathode interface. In addition, electroluminescence images at the far infrared region due to dark current injection from the cathode interface for the devises are compared (Fig. 4c). The emission image is more intense for the device with a TiO2 HBL than that without an insert HBL, suggesting the increased electron injection from the cathode by a TiO2 HBL.

thumbnail Fig. 4

(a) JV curve of PEDOT:PSS/n-Si solar cells TiO2 HBLs with different layer thicknesses. (b) EQE for devices with and without a 2-nm-thick TiO2 HBLs. The inset shows EQETiO2/EQEpristine. (c) 2D map of EQE at 1000 nm and (d) far-infrared EL emission images for devices with and without a 2-nm-thick TiO2 HBL.

Table 1

Solar cell parameters, Jsc, Voc, FF, and PCE of PEDOT:PSS/n-Si solar cells with of TiO2 HBLs of various thicknesses.

3.3 Junction property at Si/TiO2 cathode interface monitored by Trr characterization

Figure 5 shows the Trr current of a PEDOT:PSS/n-Si/Ag(Al) solar cell with different injection current (forward) levels. The Trr current increased with increasing forward current level together with an extended recovery time. This is because the number of diffused minority carriers (hole) pushed out from PEDOT:PSS to the bulk n-Si is higher for higher injection currents. Thus, the Trr study monitors the diffused (from PEDOT:PSS) minority carrier (hole) inside the bulk n-Si blocked at the cathode interface.

Figure 6b shows the Trr current of PEDOT:PSS/n-Si heterojunction solar cells with 2-nm-thick single- and double-layer TiO2, as shown in Figure 1b. The hole storage time is ∼2 and 2.8 times longer for single- and double-layer devices, respectively, compared to the pristine device without a TiO2 layer. The amount of stored charge is calculated by multiplying the corresponding ts with the maximum transient reverse current. An S of ∼750 cm/s is obtained for the single-layer TiO2 inserted device, in which a 15.5% back area of the Si surface is in direct contact with metal (Ag). This value is in a good agreement with the S value measured by conventional μ-PCD. An S value of ∼375 cm/s was obtained for the device with a coating alternating of TiO2 layers (Fig. 1b). To understand the reliability of this value obtained from the Trr, a μ-PCD measurement was performed using PEDOT:PSS and TiO2 coated n-Si samples at both front and rear sides of c-Si substrate. The S of ∼700 cm/s and ∼60 cm/s were obtained from both sides of the TiO2 (2 nm) and PEDOT:PSS (80 nm) coated n-Si (1–5 Ω cm) substrates respectively, which suggest that the photovoltaic performance is largely determined by the cathode interface.

However, these S values of the TiO2 HBL devices are still higher than for PE-CVD SiNx or a-Si devices. This is because the thinner TiO2 of ∼2 nm reacts with the underlying TiO2 during the Al metallization. Figures 7a and 7b show the XPS Ti(2p) core energy region of TiO2 on n-Si before and after Al metallization. Compared to the spectrum of pristine TiO2, two additional peaks at 457.3  eV and 463  eV appeared, which originated from the Ti3+ oxidation state. These findings suggest that TiO2 react with the Al during the evaporation and forms a Ti-O-Al complex oxide, which degrades the hole-blocking ability and passivation quality of the TiO2 layer.

thumbnail Fig. 5

Trr current for a PEDOT:PSS/n-Si heterojunction solar cell with different forward currents.

thumbnail Fig. 6

(a) Normalized EQE, EQETiO2/EQEpristine and (b) Trr current profiles of PEDOT:PSS/n-Si heterojunction solar cells with single- and double-layer of 2-nm-thick TiO2 HBLs including the recovery time for each devices.

thumbnail Fig. 7

XPS Ti(2p) core energy region of solution-processed TiO2 on n-Si (a) before and (b) after Al metallization.

4 Summary and conclusions

The junction properties at the solution-processed TiO2/n-Si interface were studied using PEDOT:PSS/n-Si heterojunction solar cells. A PCE of 13.08% was obtained for PEDOT:PSS/n-Si/TiO2 double heterojunction solar cells by adjusting the TiO2 layer thickness at the n-Si/Ag interface with increased Jsc and Voc. These findings originate from the efficient carrier collection at the n-Si/cathode interface, although surface recombination at the cathode interface dominate the photovoltaic performance. Trr provides the S value using the solar cell device structures with no need to examine both sides of TiO2 coated c-Si.

Author contribution statement

All authors contributed equally to this work.

Acknowledgments

This study was supported in part by the Ministry of Education, Culture, Sports, Science and Technology (MEXT) and the Takahashi Industrial and Economic Research Foundation.

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Cite this article as: Md. Enamul Karim, A.T.M. Saiful Islam, Yuki Nasuno, Abdul Kuddus, Ryo Ishikawa, Hajime Shirai, Solution-processed TiO2 as a hole blocking layer in PEDOT:PSS/n-Si heterojunction solar cells, EPJ Photovoltaics 11, 7 (2020)

All Tables

Table 1

Solar cell parameters, Jsc, Voc, FF, and PCE of PEDOT:PSS/n-Si solar cells with of TiO2 HBLs of various thicknesses.

All Figures

thumbnail Fig. 1

(a) Molecular structure of PEDOT:PSS, (b) schematic of PEDOT:PSS/n-Si/TiO2 double heterojunction solar cells with single- and double-TiO2 layers as an HBL.

In the text
thumbnail Fig. 2

Schematics of (a) the circuit diagram and (b) Trr current for devices with and without HBLs.

In the text
thumbnail Fig. 3

(a) AFM image and line profile for 2-nm-thick TiO2 on an n-Si wafer. (b) 2D map of τs for 2- and 10-nm-thick TiO2 coated on n-Si at both the front and bottom surfaces. (c) 2D map of τs for 80-nm-thick PEDOT:PSS.

In the text
thumbnail Fig. 4

(a) JV curve of PEDOT:PSS/n-Si solar cells TiO2 HBLs with different layer thicknesses. (b) EQE for devices with and without a 2-nm-thick TiO2 HBLs. The inset shows EQETiO2/EQEpristine. (c) 2D map of EQE at 1000 nm and (d) far-infrared EL emission images for devices with and without a 2-nm-thick TiO2 HBL.

In the text
thumbnail Fig. 5

Trr current for a PEDOT:PSS/n-Si heterojunction solar cell with different forward currents.

In the text
thumbnail Fig. 6

(a) Normalized EQE, EQETiO2/EQEpristine and (b) Trr current profiles of PEDOT:PSS/n-Si heterojunction solar cells with single- and double-layer of 2-nm-thick TiO2 HBLs including the recovery time for each devices.

In the text
thumbnail Fig. 7

XPS Ti(2p) core energy region of solution-processed TiO2 on n-Si (a) before and (b) after Al metallization.

In the text

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